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| datashee t product structure silicon monolithic integrated circuit this product has no designed protec tion against radioactive rays . 1/34 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 14 ? 001 serial eeprom series standard eeprom i 2 c bus eeprom (2-wire) br24g64-3a general description br24g64 - 3a is a serial eeprom of i 2 c bus interface method features ? all controls available by 2 ports of serial clock(scl) and serial data(sda) ? other devices than eeprom can be connected to the same port, saving microcontroller port ? 1.7v to 5.5v single power source operation most suitable for battery use ? 1.7v to 5.5vwide limit of action voltage, possible 1mhz operation ? page write mode useful for in itial value write at factory shipment ? self-timed programming cycle ? low current consumption ? prevention of write mistake ? write (write protect) function added ? prevention of write mistake at low voltage ? more than 1 million write cycles ? more than 40 years data retention ? noise filter built in scl / sda terminal ? initial delivery state ffh page write number of pages 32byte product number br24g64-3a br24g64-3a capacity bit format type power source voltage package 64kbit 8k8 br24g64-3a 1.7v to 5.5v dip-t8 br24g64f-3a sop8 br24g64fj-3a sop-j8 br24g64fv-3a ssop-b8 br24g64fvt-3a tssop-b8 br24g64fvj-3a tssop-b8j br24g64fvm-3a msop8 br24g64nux-3a vson008x2030 packages w(typ) x d(typ)x h(max) msop8 2.90mm x 4.00mm x 0.90mm sop-j8 4.90mm x 6.00mm x 1.65mm sop8 5.00mm x 6.20mm x 1.71mm dip-t8 9.30mm x 6.50mm x 7.10mm ssop-b8 3.00mm x 6.40mm x 1.35mm tssop-b8 3.00mm x 6.40mm x 1.20mm tssop-b8j 3.00mm x 4.90mm x 1.10mm v son008x2030 2.00mm x 3.00mm x 0.60mm figure 1. downloaded from: http:///
2/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 absolute maximum ratings (ta=25 ) parameter symbol rating unit remark supply voltage v cc -0.3 to +6.5 v permissible dissipation pd 450 (sop8) mw derate by 4.5mw/c when operating above ta=25c 450 (sop-j8) derate by 4.5mw/c when operating above ta=25c 300 (ssop-b8) derate by 3.0mw/c when operating above ta=25c 330 (tssop-b8) derate by 3.3mw/c when operating above ta=25c 310 (tssop-b8j) derate by 3.1mw/c when operating above ta=25c 310 (msop8) derate by 3.1mw/c when operating above ta=25c 300 (vson008x2030) derate by 3.0mw/c when operating above ta=25c 800 (dip-t8) derate by 8.0mw/c when operating above ta=25c storage temperature tstg -65 to +150 operating temperature topr -40 to +85 input voltage / output voltage \ -0.3 to vcc+1.0 v the max value of input voltage/out put voltage is not over 6.5v. when the pulse width is 50ns or less, the min value of input voltage/output voltage is not lower than -1.0v. junction temperature tjmax 150 junction temperature at the storage condition electrostatic discharge voltage (human body model) v esd -4000 to +4000 v memory cell characteristics (ta=25 , vcc=1.7v to 5.5v) parameter limit unit min typ max write cycles (1) 1,000,000 - - times data retention (1) 40 - - years (1) not 100% tested recommended operating ratings parameter symbol rating unit power source voltage vcc 1.7 to 5.5 v input voltage v in 0 to vcc dc characteristics (unless otherwise specified, ta=-40 to +85 , vcc =1.7v to 5.5v) parameter symbol limit unit conditions min typ max input high voltage 1 v ih1 0.7vcc - vcc+1.0 v input low voltage 1 v il1 -0.3 (2) - +0.3vcc v output low voltage 1 v ol1 - - 0.4 v i ol =3.0ma, 2.5v vcc 5.5v (sda) output low voltage 2 v ol2 - - 0.2 v i ol =0.7ma, 1.7v vcc 2.5v (sda) input leakage current i li -1 - +1 a v in =0 to vcc output leakage current i lo -1 - +1 a v out =0 to vcc (sda) supply current (write) i cc1 - - 2.5 ma vcc=5.5v, f scl =1mhz, t wr =5ms, byte write, page write supply current (read) i cc2 - - 2.0 vcc=5.5v, f scl =1mhz random read, current read, sequential read standby current i sb - - 2.0 a vcc=5.5v, sda, scl=vcc a0, a1, a2=gnd,wp=gnd (2) when the pulse width is 50ns or less, it is -1.0v. downloaded from: http:/// 3/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 ac characteristics (unless otherwise specified, ta=-40 to +85 , v cc =1.7v to 5.5v) parameter symbol limit unit min typ max clock frequency fscl - - 1000 khz data clock high period t high 0.30 - - s data clock low period t low 0.5 - - s sda, scl (input) rise time (1) t r - - 0.12 s sda, scl (input) fall time (1) t f1 - - 0.12 s sda (output) fall time (1) t f2 - - 0.12 s start condition hold time t hd:sta 0.25 - - s start condition setup time t su:sta 0.20 - - s input data hold time t hd:dat 0 - - ns input data setup time t su:dat 50 - - ns output data delay time t pd 0.05 - 0.45 s output data dold time t dh 0.05 - - s stop condition setup time t su:sto 0.25 - - s bus free time t buf 0.5 - - s write cycle time t wr - - 5 ms noise spike width (sda, scl) t i - - 0.05 s wp hold time t hd:wp 1.0 - - s wp setup time t su:wp 0.1 - - s wp high period t high:wp 1.0 - - s (1) not 100% tested ac characteristics condition parameter symbol conditions unit load capacitance c l 100 pf sda, scl (input) rise time t r 20 ns sda, scl (input) fall time t f1 20 ns input data level v il1 /v ih1 0.2vcc/0.8vcc v input/output data timing reference level - 0.3vcc/0.7vcc v downloaded from: http:/// 4/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 serial input / output timing data(1) d0 ack d1 data(n) ack twr 30% 70% t t thd:wp tsu:wp 30% 70% figure 2-(e). wp timing at write cancel figure 2-(d). wp timing at write execution figure 2-(c). write cycle timing figure 2-(b). start-stop bit timing figure 2-(a). serial input / output timing input read at the rise edge of scl data output in sync with the fall of scl scl sda ( ) sda ( ) tr tf1 thigh tsu:dat tlow thd:dat tdh tpd tbuf thd:sta 70% 30% 70% 70% 30% 70% 70% 30% 30% 70% 70% 30% 70% 70% 70% 70% 30% 30% 30% 30% tf2 70% 70% tsu:sta thd:sta tat t tsu:sto t t 30% 30% 70% 70% d0 ack twr (n-th address) tat t t t 70% 70% data(1) d0 d1 ack data(n) ack thigh:wp 70% 70% twr 70% (input) (output) downloaded from: http:/// 5/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 block diagram figure 3. block diagram pin configuration (top view) pin descriptions terminal name input/ output descriptions br24g64-3a a0 input slave address setting* a1 input slave address setting* a2 input slave address setting* gnd - reference voltage of all input / output, 0v sda input/ output serial data input serial data output scl input serial clock input wp input write protect terminal vcc - connect the power source. *a0, a1 and a2 are not allowed to use as open. 1 1 1 2 1 3 1 4 1 1 6 1 5 br24g64-3a a0 1 7 a1a2 gnd vccwp scl 8 sda 8 7 6 5 4 3 2 1 sda scl wp v cc gnd a 2 a 1 a 0 a ddress decoder word a ddress register data register control circuit high voltage generating circuit power source voltage detection 8bit a ck start stop 64kbit eeprom array 13bit downloaded from: http:/// 6/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 typical performance curves figure 4. input high voltage vs supply voltage (a0, a1, a2, scl, sda, wp) figure 5. input low voltage vs supply voltage (a0, a1, a2, scl, sda, wp) figure 6. output low voltage1 vs output low current (vcc=2.5v) figure 7. output low voltage2 vs output low current (vcc=1.7v) 0 1 2 3 4 5 6 0123456 supply voltage : vcc(v) input low voltage : v il1 (v) ta=-40 ta= 25 ta= 85 spec 0 1 2 3 4 5 6 0123456 supply voltage : vcc(v) input high voltage : v ih1 (v) ta=-40 ta= 25 ta= 85 spec 0 0.2 0.4 0.6 0.8 1 0123456 output low current: i ol (ma) output low voltage1 : v ol1 (v) spec ta=-40 ta= 25 ta= 85 out p ut low current: i ol ( ma ) 0 0.2 0.4 0.6 0.8 1 0123456 output low current: i ol (ma) output low voltage2 : v ol2 (v) ta=-40 ta= 25 ta= 85 spec out p ut low current: i ol ( ma ) downloaded from: http:/// 7/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 typical performance curves \ continued figure 8. input leakage current vs supply voltage (a0, a1, a2, scl, wp) figure 9. output leakage current vs supply voltage (sda) figure 10. supply current (write) vs supply voltage (f scl =1mhz) figure 11. supply current (read) vs supply voltage (f scl =1mhz) 0 0.2 0.4 0.6 0.8 1 1.2 0123456 supply voltage : vcc(v) input leakage current : i li (a) ta=-40 ta= 25 ta= 85 spec 0 0.2 0.4 0.6 0.8 1 1.2 0123456 supply voltage : vcc(v) output leakage current : i lo (a) ta=-40 ta= 25 ta= 85 spec 0 0.5 1 1.5 2 2.5 3 0123456 supply voltage : vcc(v) supply current (write) : icc1(ma) ta=-40 ta= 25 ta= 85 spec 0 0.5 1 1.5 2 2.5 0123456 supply voltage : vcc(v) supply current (read) : i cc2 (ma) t= t= t= downloaded from: http:/// 8/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 typical performance curves \ continued figure 12. standby current vs supply voltage figure 13. clock frequency vs supply voltage figure 14. data clock high period vs supply voltage figure 15. data clock low period vs supply voltage 0.1 1 10 100 1000 10000 0123456 supply voltage : vcc(v) clock frequency : fscl(khz) t= t= t= 0 0.1 0.2 0.3 0.4 0123456 supply voltage : vcc(v) data clock high period : t high (s) t= t= t= 0 0.1 0.2 0.3 0.4 0.5 0.6 supply voltage : vcc(v) data clock low period : t low (s) t= t= t= 0 0.5 1 1.5 2 2.5 0123456 supply voltage : vcc(v) standby current: i sb (a) t= t= t= downloaded from: http:/// 9/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 typical performance curves \ continued figure 17. start condition hold time vs supply voltage figure 16. sda (output) fall time vs supply voltage figure 18. start condition setup time vs supply voltage 0 0.05 0.1 0.15 0.2 0.25 0.3 supply voltage : vcc(v) start condition hold time : t hd:sta (s) t= t= t= 0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 supply voltage : vcc(v) sda (output) fall time : t f2 (s) t= t= t= 0 0.05 0.1 0.15 0.2 0.25 0.3 0123456 supply voltage : vcc(v) start condition setup time : t su:sta (s) t= t= t= figure 19. input data hold time vs supply voltage (high) -150 -100 -50 0 50 0123456 supply voltage : vcc(v) input data hold time : t hd:dat (ns) t= t= t= downloaded from: http:/// 10/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 typical performance curves \ continued -150 -100 -50 0 50 0123456 supply voltage : vcc(v) input data hold time : t hd:dat (ns) t= t= t= 0 10 20 30 40 50 60 0123456 supply voltage : vcc(v) input data setup time : t su:dat (ns) t= t= t= 0 10 20 30 40 50 60 0123456 supply voltage : vcc(v) input data setup time : t su:dat (ns) t= t= t= 0 0.1 0.2 0.3 0.4 0.5 0123456 supply voltage : vcc(v) output data delay time : t pd0 (s) t= t= t= figure 20. input data hold time vs supply voltage (low) figure 21. input data setup time vs supply voltage (high) figure 22. input data setup time vs supply voltage (low) figure 23. output data delay time vs supply voltage downloaded from: http:/// 11/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 typical performance curves \ continued 0 0.1 0.2 0.3 0.4 0.5 0123456 supply voltage : vcc(v) output data delay time : t pd1 (s) t= t= t= 0 0.05 0.1 0.15 0.2 0.25 0.3 0123456 supply voltage : vcc(v) stop condition setup time : t su:sto (s) t= t= t= 0 0.1 0.2 0.3 0.4 0.5 0.6 supply voltage : vcc(v) bus free time : t buf (s) t= t= t= 0 1 2 3 4 5 6 0123456 supply voltage : vcc(v) write cycle time : t wr (ms) ta=-40 ta= 25 ta= 85 spec figure 26. bus free time vs supply voltage figure 24. output data delay time vs supply voltage figure 25. stop condition setup time vs supply voltage figure 27. write cycle time vs supply voltage downloaded from: http:/// 12/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 figure 31. noise spike width vs supply voltage (sda low) figure 30. noise spike width vs supply voltage (sda high) figure 29. noise spike width vs supply voltage (scl low) figure 28. noise spike width vs supply voltage (scl high) typical performance curves \ continued 0 0.05 0.1 0.15 0.2 0.25 0.3 0123456 supply voltage : vcc(v) noise spike width(scl low) : ti(s) t= t= t= 0 0.05 0.1 0.15 0.2 0.25 0.3 0123456 supply voltage : vcc(v) noise spike width(scl high) : ti(s) t= t= t= 0 0.05 0.1 0.15 0.2 0.25 0.3 0123456 supply voltage : v cc(v) noise spike width(sda low) : t i (s) t= t= t= 0 0.05 0.1 0.15 0.2 0.25 0.3 0123456 supply voltage : vcc(v) noise spike width(sda high) : t i (s) t= t= t= downloaded from: http:/// 13/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 figure 34. wp high period vs supply voltage figure 33. wp setup time vs supply voltage figure 32. wp hold time vs supply voltage typical performance curves \ continued 0 0.2 0.4 0.6 0.8 1 1.2 0123456 supply voltage : vcc(v) wp hold time : t hd:wp (s) t= t= t= -0.3 -0.2 -0.1 0 0.1 0.2 0123456 supply voltage : vcc(v) wp setup time : t su:wp (s) t= t= t= 0 0.2 0.4 0.6 0.8 1 1.2 supply voltage : vcc(v) wp high period : t high:wp ( s) t= t= t= downloaded from: http:/// 14/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 timing chart 1. i 2 c bus data communication i 2 c bus data communication starts by start condition input, and e nds by stop condition input. data is always 8bit long, and acknowledge is always required after each byte. i 2 c bus data communication with several devices is possible by connecting with 2 communication lines: serial data (sda) and serial clock (scl). among the devices, there should be a ma ster that generates clock and control communication start and end. the rest become slave which are controlled by an address peculiar to each device, like this eepro m. the device that outputs data to the bus during data communication is called transmitter, and the device that receives data is called receiver. 2. start condition (start bit recognition) (1) before executing each command, start condition (start bit) where sda goes from 'high' down to 'low' when scl is 'high' is necessary. (2) this ic always detects whether sda and scl are in start co ndition (start bit) or not, therefore, unless this condition is satisfied, any command cannot be executed. 3. stop condition (stop bit recognition) (1) each command can be ended by a stop condition (stop bit) where sda goes from 'low' to 'high' while scl is 'high'. 4. acknowledge (ack) signal (1) this acknowledge (ack) signal is a software rule to show whether data transfer has been made normally or not. in master-slave communication, the device (ex. -com sends slave address input for write or read command to this ic) at the transmitter (sending) side releas es the bus after output of 8bit data. (2) the device (ex. this ic receives the slave address input for write or read command from the -com) at the receiver (receiving) side sets sda 'low' during 9 th clock cycle, and outputs acknowledge signal (ack signal) showing that it has received the 8bit data. (3) this ic, after recognizing start condition and slave address (8bit), outputs acknowledge signal (ack signal) 'low'. (4) after receiving 8bit data (word address and write data) during each write operation, th is ic outputs acknowledge signal (ack signal) 'low'. (5) during read operation, this ic outputs 8bit data (read data), and detects acknowledge signal (ack signal) 'low'. when acknowledge signal (ack signal) is detected, and stop condition is not sent from the master ( -com) side, this ic continues to output data. when acknowledge signal (a ck signal) is not detected, this ic stops data transfer, and recognizes stop condition (stop bit), and ends read operation. then this ic becomes ready for another transmission. 5. device addressing (1) slave address comes start condition from master. (2) the significant 4 bits of slave address are used for recognizing a device type. the device code of this ic is fixed to '1010'. (3) next slave addresses (a2 a1 a0 --- device address) ar e for selecting devices, and plural ones can be used on a same bus according to the number of device addresses. (4) the most insignificant bit (r/w --- read / write) of slave address is used for designating write or read operation, and is as shown below. setting r / w DD to 0 ------- write (setting 0 to word address setting of random read) setting r / w DD to 1 ------- read type slave address maximum number of connected buses br24g64-3a 1 0 1 0 a2 a1 a0 r/ w DD 8 a t a ata ata a tat a a figure 35. data transfer timing downloaded from: http:/// 15/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 write command 1. write cycle (1) arbitrary data can be written to eeprom. when writing only 1 byte, byte write is normally used, and when writing continuous data of 2 bytes or more, simultaneous write is possible by page write cycle. the maximum number of write bytes is specified per device of each capacity. up to 32 arbitrary bytes can be written. (2) during internal write execution, all input commands are ignored, theref ore ack is not returned. (3) data is written to the address designated by word address (n-th address) (4) by issuing stop bit after 8bit data input, internal write to memory cell starts. (5) when internal write is started, command is not accepted for t wr (5ms at maximum). (6) using page write cycle, writing in bulk is done as fo llows: when data of more than 32 bytes is sent, the bytes in excess overwrite the data already sent first. (refer to "internal address increment" on page 16) (7) as for page write cycle of br24g64-3a, where 2 or mo re bytes of data is intended to be written, after the 8 significant bits of word address are desig nated arbitrarily, only the value of 5 least significant bits in the address is incremented internally, so that data up to 32 bytes of memory only can be written. a1 a2 wa 14 1 1 0 0 w r i t e s t a r t r / w s t o p 1st word address data slave address a0 d0 a c k sda line a c k a c k wa 0 a c k 2nd word address d7 *1 wa 15 wa 13 wa 12 wa 11 *1 wa13 to wa15 become don't care. figure 36. byte write cycle figure 37. page write cycle *1 wa13 to wa15 become don't care. w r i t e s t a r t r / w a c k s t o p 1st word a ddress(n) sda line a c k a c k data(n+31) a c k slave a ddress 1 0 0 0 1 0 a 0 a 1 a 2 wa 14 d0 *1 data(n) d0 d7 a c k 2nd word a ddress(n) wa 0 wa 15 wa 13 wa 12 wa 11 downloaded from: http:/// 16/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 2. notes on write cycle continuous input list of numbers of page write number of pages 32byte product number br24g64-3a the above numbers are maximum bytes for respective types. any bytes below these can be written. in the case br24g64-3a, 1 page=32bytes, but the page write cycle time is 5ms at maximum for 32byte bulk write. it does not stand 5ms at maximum 32byte=160ms(max) 3. internal address increment page write mode 4. write protect (wp) terminal write protect (wp) function when wp terminal is set at vcc (h level), data rewrite of all addresses is prohibited. when it is set gnd (l level), data rewrite of all address is enabled. be sure to connect this termina l to vcc or gnd, or control it to h level or l level. do not leave it open. in case of using it as rom, it is re commended to connect it to pull up or vcc. at extremely low voltage at power on/off, by setting the wp terminal h, write error can be prevented. for example, when it is started from address 1eh, then, increment is made as below, 1eh 1fh 00h 01h ??? please take note. 1eh ??? 1e in hexadecimal, therefore, 00011110 becomes a binary number. aaaaaaaa downloaded from: http:/// 17/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 read command 1. read cycle read cycle is when data of eeprom is read. read cycle could be random read cycle or current read cycle. random read cycle is a command to read data by designating a specific address, and is used generally. current read cycle is a command to read data of internal address register without designating an address, and is used when to verify just after write cycle. in both the read cycles, sequential read cycl e is available where the next address data can be read in succession. (1) in random read cycle, data of designated word address can be read. (2) when the command just before current read cycle is r andom read cycle, current read cycle (each including sequential read cycle), data of incremented last read addr ess (n)-th, i.e., data of the (n+1)-th address is output. (3) when ack signal 'low' after d0 is detected, and stop condi tion is not sent from ma ster (-com) side, the next address data can be read in succession. (4) read cycle is ended by stop condition where 'h' is input to ack signal after d0 and sda signal goes from l to h while at scl signal is 'h'. (5) when 'h' is not input to ack signal after d0, sequential read gets in, and the next data is output. therefore, read command cycle cannot be ended. to end read command cycle, be sure to input 'h' to ack signal after d0, and the stop condition where sda goes from l to h while scl signal is 'h'. (6) sequential read is ended by stop condition where 'h' is input to ack signal after arbitrary d0 and sda is asserted from l to h while scl signal 'h'. t t a t a t a a a a ata a a a a a a a a a t a t a a a a a a a a a a a figure 38. random read cycle *1 wa13 to wa15 become dont care. s t a r t s t o p sda line a c k data(n) a c k slave address 10 0 1 a0 a1 a2 d0 d7 r / w r e a d figure 39. current read cycle a t a t a t ata a a a ata a a a a a a figure 40. sequential read cycle (in the case of current read cycle) downloaded from: http:/// 18/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 software reset software reset is executed to avoid malfunction after po wer on, and during command input. software reset has several kinds, and 3 kinds of them are shown in the figure below. (ref er to figure 41-(a), figure41-(b), figure 41-(c).) within the dummy clock input area, release the sda bus is released ('h' by pull up) and ack output and read data '0' (both 'l' level) may be output from eeprom. therefore, if 'h' is input forcibly, output may conflict and over current may flow, leading to instantaneous power failure of system power source or influence upon devices. acknowledge polling during internal write execution, all in put commands are ignored, therefore ack is not returned. during internal automatic write execution after write cycle input, next command (slave addre ss) is sent. if the first ack signal sends back 'l', then it means end of write operation, else 'h' is returned, which m eans writing is still in progress. by the use of acknowledge polling, next command can be executed without waiting for t wr = 5ms. to write continuously, r/w = 0, then to ca rry out current read cycle after write, sl ave address with r/w = 1 is sent, and if ack signal sends back 'l', then execute word address input and data output and so forth. 1 2 13 14 scl dummy clock14 start2 scl figure 41-(a). the case of dummy clock 14 +start+start+ command input start command from start input. 2 1 8 9 dummy clock 9 start figure 41-(b). the case of start + dummy clock 9 +start+ command input start normal command normal command normal command normal command start 9 sda sda scl sd 1 2 3 8 9 7 figure 41-(c). start9 + command input normal command normal command sda slave address word address s t a r t first write command a c k h a c k l slave address slave address slave address data write command during internal write, ack = high is returned. after completion of internal write, ack=low is returned, so input next word address and data in succession. t wr t wr second write command st a r t st a r t s t a r t st a r t s t o p st o p a c k h a c k h a c k l a c k l figure 42. case to continuous write by acknowledge polling downloaded from: http:/// 19/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 wp valid timing (write cancel) wp is usually fixed to 'h' or 'l', but when wp is used to cancel write cycle and so on, pay attention to the following wp valid timing. during write cycle execution, inside cancel valid area, by setting wp='h', write cycle can be cancelled. in both byte write cycle and page write cycle, the area from the first start condition of command to the rise of clock to take in d0 of data (in page write cycle, the first byte data) is the cancel invalid area. wp input in this area becomes don't care. the area from the ri se of scl to take in d0 to the stop condition input is the cancel valid area. furthermore, after the execution of forced end by wp, the ic enters standby status. command cancel by start condition and stop condition during command input, by continuously inputting start conditi on and stop condition, command can be cancelled. (figure 44.) however, within ack output area and during data read, sda bus may output 'l'. in this case, start condition and stop condition cannot be input, so reset is not available. theref ore, execute software reset. when command is cancelled by start-stop condition during random read cycle, sequential read cycle, or current read cycle, internal setting address is not determined. therefore, it is not possible to carry out current read cycle in succession. to carry out read cycle in succession, carry out random read cycle. ? rise of d0 taken clock scl d0 ack enlarged view scl sda ack d0 ? rise of sda sda wp wp cancel invalid area wp cancel valid area data is not written. figure 43. wp valid timing slave address d7 d6 d5 d4 d3 d2 d1 d0 data t wr sda d1 s t a r t a c k l a c k l a c k l a c k l s t o p word address figure 44. case of cancel by start, stop condition during slave address input scl sda 1 1 0 0 start condition stop condition enlarged view wp cancel invalid area downloaded from: http:/// 20/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 i/o peripheral circuit 1. pull up resistance of sda terminal sda is nmos open drain, so it requires a pu ll up resistor. as for this resistor value (r pu ), select an appropriate value from microcontroller v il , i l , and v ol -i ol characteristics of this ic. if r pu is large, operating fr equency is limited. the smaller the r pu , the larger is the supply current (read). . 2. maximum value of r pu the maximum value of r pu is determined by the following factors. (1) sda rise time to be determined by the capacitance (c bus ) of bus line and r pu of sda should be t r or lower. and ac timing should be satisfied even when sda rise time is slow. (2) the bus electric potential a to be determined by input leak total (i l ) of device connected to the bus with output of 'h' to sda line and r pu should sufficiently secure the input 'h' level (v ih ) of microcontroller and eeprom including recommended noise ma rgin of 0.2vcc. v cc - i l r pu - 0.2vcc v ih r pu 0.8v cc v ih i l ex.) v cc =3v i l =10 a v ih =0.7 vcc from(2) 30 [k ? ] r pu 0.83 0.73 1010 -6 3. minimum value of r pu the minimum value of r pu is determined by the following factors. (1) when ic outputs low, it should be satisfied that v olmax =0.4v and i olmax =3ma. (2) v olmax =0.4v should secure the input 'l' level (v il ) of microcontroller and eeprom including recommended noise margin 0.1vcc. v olmax v il -0.1vcc ex.) vcc =3v, v ol =0.4v, i ol =3ma, microcontroller, eeprom v il =0.3vcc and v ol =0.4 v v il =0.3 3 =0.9 [v] therefore, the conditi on (2) is satisfied. 4. pull up resistance of scl terminal when scl control is made at the cmos output port, there is no need for a pull up re sistor. but when there is a time where scl becomes 'hi-z', add a pull up resistor. as for the pull up resistor value, one of several k ? to several ten k ? is recommended in consideration of drive per formance of output port of microcontroller. 867 [ ? ] r pu 3 0.4 310 from (1) microcontroller r pu a sda terminal i l i l bus line capacity c bus figure 45. i/o circuit diagram eeprom i ol r pu v cc v ol i ol v cc v o l r pu downloaded from: http:/// 21/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 cautions on microcontroller connection 1. r s in i 2 c bus, it is recommended that sda port is of open drain input/output. howeve r, when using cmos input / output of tri state to sda port, insert a series resistance r s between the pull up resistor r pu and the sda terminal of eeprom. this is to control over curr ent that may occur when pmos of t he microcontroller and nmos of eeprom are turned on simultaneously. r s also plays the role of protecting the sd a terminal against surge. therefore, even when sda port is open drain input/output, r s can be used. 2. maximum value of rs the maximum value of rs is determined by the following relations. (1) sda rise time to be determined by the capacity (c bus ) of bus line and r pu of sda should be t r or lower. and ac timing should be satisfied even when sda rise time is slow. (2) the bus electric potential a to be determined by r pu and rs the moment when eeprom outputs 'l' to sda bus should sufficiently secure the input 'l' level (v il ) of microcontroller including recommended noise margin of 0.1vcc. 3. minimum value of rs the minimum value of rs is determined by over current at bus collision. when over current flows, noises in power source line and instantaneous power failure of power source may occur. when allowable over current is defined as i, the following relation must be satisfied. determine the allowable current in considerati on of the impedance of power source line in set and so forth. set the over current to eeprom at 10ma or lower. r pu microcontroller r s eeprom figure 46. i/o circuit diagram figure 47. input / output collision timing a ck 'l' output of eeprom 'h' output of microcontroller over current flows to sda line by 'h' output of microcontroller and 'l' output of eeprom. scl sda microcontroller eeprom 'l'output r s r pu 'h' output over current i figure 49. i/o circuit diagram 1.67 [k ? ] 0.33 0.4 0.13 2010 3 1.13 0.33 r s r pu 1.1v cc -v il ex. v cc =3v v il =0.3v cc v ol =0.4v r pu =20k r s v il v ol 0.1v cc (v cc v ol )r s +v ol +0.1v cc v il r pu +r s v cc r s v cc i 300 [ ? ] ex.) v cc =3v, i=10m a r s 3 1010 -3 i r s r pu micro controller r s eeprom i ol a bus line capacity c bus v ol v cc v il figure 48. i/o circuit diagram downloaded from: http:/// 22/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 i/o equivalence circuit 1. input (a0, a1, a2, scl, wp) 2. input / output (sda) power-up/down conditions at power on, the ics internal circuits may go through unstabl e low voltage area as the vcc rises, making the ics internal logic circuit not completely reset, hence, malfunction may occur. to prevent this, the ic is equipped with por circuit and lvcc circuit. to assure the operation, obser ve the following conditions at power on. 1. set sda = 'h' and scl ='l' or 'h 2. start power source so as to satisfy the recommended conditions of t r , t off , and v bot for operating por circuit. t off t r v bot 0 v cc 3. set sda and scl so as not to become 'hi-z'. when the above conditions 1 and 2 cannot be obs erved, take the following countermeasures. (1) in the case when the above condition 1 cannot be observed such that sda becomes 'l' at power on. control scl and sda as shown below, to make scl and sda, 'h' and 'h'. (2) in the case when the above condition 2 cannot be observed. after power source becomes stable, execute software reset(page 18). (3) in the case when the above conditions 1 and 2 cannot be observed. carry out (1), and then carry out (2). low voltage malfunction prevention function lvcc circuit prevents data rewrite operation at low power, and pr events write error. at lvcc voltage (typ =1.2v) or below, data rewrite is prevented. noise countermeasures 1. bypass capacitor when noise or surge gets in the power source line, malfunct ion may occur, therefore, it is recommended to connect a bypass capacitor (0.1 f) between the ics v cc and gnd pins. connect the capacitor as close to the ic as possible. in addition, it is also recommended to connect a bypass capacitor between boards v cc and gnd. recommended conditions of t r , t off ,v bot t r t off v bot 10ms or below 10ms or larger 0.3v or below 100ms or below 10ms or larger 0.2v or below figure 52. rise waveform diagram figure 50. input pin circuit diagram figure 51. input / output pin circuit diagram t low t su:dat t dh a fter vcc becomes stable scl v cc sda fi g .53 = a= t su:dat a fter vcc becomes stable fi g .54 = a= figure 53. when scl=h and sda=l figure 54. when scl=l and sda=l downloaded from: http:/// 23/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 operational notes 1. described numeric values and data are design represent ative values only, and the va lues are not guaranteed. 2. we believe that the application circuit examples in this document are recommendable. howe ver, in actual use, confirm characteristics further sufficiently. if changing the fixed num ber of external parts is desired, make your decision with sufficient margin in consideration of st atic characteristics, transient characteri stics, and fluctuations of external parts and our lsi. 3. absolute maximum ratings if the absolute maximum ratings such as supply voltage, operating temperature range, and so on are exceeded, lsi may be destroyed. do not supply voltage or subject the ic to temperatures exceeding the absolute maximum ratings. in the case of fear of exceeding the absolute maximum rati ngs, take physical safety countermeasures such as adding fuses, and see to it that conditions exceeding the absol ute maximum ratings should not be supplied to the lsi. 4. gnd electric potential set the voltage of gnd terminal lowest at any operating condition. make sure that each terminal voltage is not lower than that of gnd terminal. 5. thermal design use a thermal design that allows for a suff icient margin by taking into account t he permissible power dissipation (pd) in actual operating conditions. 6. short between pins and mounting errors be careful when mounting the ic on printed circuit boards . the ic may be damaged if it is mounted in a wrong orientation or if pins are shorted toget her. short circuit may be caused by conductive particles caught between the pins. 7. operating the ic in the pr esence of strong electromagnetic field may ca use malfunction, ther efore, evaluate design sufficiently. downloaded from: http:/// 24/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 part numbering b r 2 4 g 6 4 x x x - 3 a x x x x lineup capacity package orderable part number remark type quantity 64k dip-t8 tube of 2000 br24g64 -3a not halogen free 100% sn sop8 reel of 2500 br24g64f -3agte2 halogen free 100% sn sop-j8 br24g64fj -3agte2 halogen free 100% sn ssop-b8 reel of 2500 br24g64fv -3agte2 halogen free 100% sn tssop-b8 reel of 3000 br24g64fvt -3age2 halogen free 100% sn tssop-b8j reel of 2500 br24g64fvj -3agte2 halogen free 100% sn msop8 reel of 3000 br24g64fvm -3agttr halogen free 100% sn vson008x2030 reel of 4000 br24g64nux -3attr halogen free 100% sn bus type 24 : i 2 c operating temperature / operating voltage -40 to +85 / 1.7v to 5.5v package blank f fv fvj nux : dip-t8 : sop8 : ssop-b8 : tssop-b8j : vson008x2030 fj fvt fvm : sop-j8 : tssop-b8 : msop8 capacity 64=64k process code revision g : halogen free blank : not halogen free as an exception, vson008x2030 package will be halogen free with blank t : 100% sn blank : 100% sn packaging and forming specification e2 : embossed tape and reel (sop8, sop-j8, tssop-b8, tssop-b8j) tr : embossed tape and reel (msop8, vson008x2030) none : tube (dip-t8) downloaded from: http:/// 25/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 physical dimensions tape and reel information ? order quantity needs to be multiple of the minimum quantity. 26/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 ? order quantity needs to be multiple of the minimum quantity. 27/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 ? order quantity needs to be multiple of the minimum quantity. 28/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 ? order quantity needs to be multiple of the minimum quantity. 29/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 direction of feed reel ? order quantity needs to be multiple of the minimum quantity. 30/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 direction of feed reel ? order quantity needs to be multiple of the minimum quantity. 31/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 direction of feed reel ? order quantity needs to be multiple of the minimum quantity. 32/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 ? order quantity needs to be multiple of the minimum quantity. 33/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 marking diagrams sop8(top view) 4g64a part number marking lot numbe r 1pin mark sop-j8(top view) 4g64a part number marking lot number 1pin mark tssop-b8j(top view) 4a3 part number marking lot number 1pin mark 4g6 vson008x2030 (top view) 4a3 part number marking lot number 1pin mark 4g6 msop8(top view) 4gg part number marking lot number 1pin mark a tssop-b8(top view) 4g64a part number marking lot numbe r 1pin mark ssop-b8(top view) 4gga part number marking lot number 1pin mark dip-t8 (top view) br24g64a part number marking lot number downloaded from: http:/// 34/34 datasheet datasheet br24g64-3a ? 2014 rohm co., ltd. all rights reserved. www.rohm.com tsz22111 ? 15 ? 001 tsz02201-0r2r0g100040-1-2 27.aug.2014 rev.004 revision history date revision changes 15.may.2012 001 new release 25.feb.2013 002 update some english words, sentences descriptions, grammar and formatting. 31.may.2013 003 p1 change format of package line-up table. p.2 add vesd in absolute maximum ratings p.5 add directions in pin descriptions 27.aug.2014 004 p.3 modified tsu:sta (0.25->0.20) p.24 update part numbering. add lineup table downloaded from: http:/// datasheet datasheet notice C ge rev.002 ? 2013 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. our products are designed and manufac tured for application in ordinary elec tronic equipments (such as av equipment, oa equipment, telecommunication equipment, home electroni c appliances, amusement equipment, etc.). if you intend to use our products in devices requiring ex tremely high reliability (such as medical equipment (note 1) , transport equipment, traffic equipment, aircraft/spacecra ft, nuclear power controllers, fuel c ontrollers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (specific applications), please consult with the rohm sale s representative in advance. unless otherwise agreed in writing by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ro hms products for specific applications. (note1) medical equipment classification of the specific applications japan usa eu china class class class b class class | class 2. rohm designs and manufactures its products subject to strict quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe desi gn against the physical injury, damage to any property, which a failure or malfunction of our products may cause. the following are examples of safety measures: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditio ns, as exemplified below. accordin gly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of an y rohms products under any special or extraordinary environments or conditions. if you intend to use our products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] use of our products in any types of liquid, incl uding water, oils, chemicals, and organic solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products ar e exposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed to static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing components, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (ev en if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4. the products are not subjec t to radiation-proof design. 5. please verify and confirm characteristics of the final or mounted products in using the products. 6. in particular, if a transient load (a large amount of load applied in a short per iod of time, such as pulse. is applied, confirmation of performance characteristics after on-boar d mounting is strongly recomm ended. avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading c ondition may negatively affect product performance and reliability. 7. de-rate power dissipation (pd) depending on ambient temper ature (ta). when used in seal ed area, confirm the actual ambient temperature. 8. confirm that operation temperat ure is within the specified range described in the product specification. 9. rohm shall not be in any way responsible or liable for fa ilure induced under deviant condi tion from what is defined in this document. precaution for mounting / circuit board design 1. when a highly active halogenous (chlori ne, bromine, etc.) flux is used, the resi due of flux may negatively affect product performance and reliability. 2. in principle, the reflow soldering method must be used; if flow soldering met hod is preferred, please consult with the rohm representative in advance. for details, please refer to rohm mounting specification downloaded from: http:/// datasheet datasheet notice C ge rev.002 ? 2013 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, pl ease allow a sufficient margin considering variations of the characteristics of the products and external components, including transient characteri stics, as well as static characteristics. 2. you agree that application notes, re ference designs, and associated data and in formation contained in this document are presented only as guidance for products use. theref ore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take proper caution in your manufacturing process and storage so that voltage exceeding t he products maximum rating will not be applied to products. please take special care under dry condit ion (e.g. grounding of human body / equipment / solder iron, isolation from charged objects, se tting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriora te if the products are stor ed in the places where: [a] the products are exposed to sea winds or corros ive gases, including cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to di rect sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage c ondition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm sol derability before using products of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the co rrect direction, which is indicated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. use products within the specified time after opening a humidity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage time period. precaution for product label qr code printed on rohm products label is for rohms internal use only. precaution for disposition when disposing products please dispose them proper ly using an authorized industry waste company. precaution for foreign exchange and foreign trade act since our products might fall under cont rolled goods prescribed by the applicable foreign exchange and foreign trade act, please consult with rohm representative in case of export. precaution regarding intellectual property rights 1. all information and data including but not limited to application example contained in this document is for reference only. rohm does not warrant that foregoi ng information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. rohm shall not be in any way responsible or liable for infringement of any intellectual property rights or ot her damages arising from use of such information or data.: 2. no license, expressly or implied, is granted hereby under any intellectual property rights or other rights of rohm or any third parties with respect to the information contained in this document. other precaution 1. this document may not be reprinted or reproduced, in whol e or in part, without prior written consent of rohm. 2. the products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of rohm. 3. in no event shall you use in any wa y whatsoever the products and the related technical information contained in the products or this document for any military purposes, incl uding but not limited to, the development of mass-destruction weapons. 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties. downloaded from: http:/// datasheet datasheet notice C we rev.001 ? 2014 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. downloaded from: http:/// |
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